Hyeongu Lee

 hyeongulee@kaist.ac.kr


 Education

  • 2019.9 ~             : KAIST, Ph.D Candidate, School of Electrical Engineering

  • 2019.2 ~ 2019.9 : KAIST, Researcher, School of Electrical Engineering

  • 2017.3 ~ 2019.2 : KAIST, MS, Electrical Engineering

  • 2011.3 ~ 2017.2 : KyungHee University, BS, Information Display

  • 2008.3 ~ 2011.2 : Uijeongbu High School


Research





Other Research interests




Publication

  • Journal

  • Selected Conference
1. "Effects of Shell Thickness on Performance of GaSb/InAs Core/Shell Nanowire pMOSFETs", 이현구, 신민철, 제 25회 반도체 학술대회, 정선, 2018. (분과우수논문상 수상)

2. "Quantum Transport Simulations of Gate-all-around Nanowire pFETs with Arbitrary Shaped Cross-section in the Presence of Hole-phonon Interaction", Hyeongu Lee and Mincheol Shin, International Workshop on Computational Nanotechnology (IWCN) 2019, Evanston, IL, USA, 2019. 

3. "Quantum Transport Simulations of the Zero Temperature Coefficient in Gate-all-around Nanowire pFETs”,  Hyeongu Lee, Junbeom Seo, and Mincheol Shin, International Conference on Simulation of Semiconductor Process and Devices (SISPAD), Udine, Italy, 2019.

  • Patent