Hyoeun Jung

     Introduction

• Strain engineering has become a compulsory technique to give an enhanced performance in nanoscale MOSFET

• devices such as ultra-thin-body(UTB) FET, FinFET, and nanowire FET. 

• Nanoscaled-devices can withstand large non-intentional strains due to fabrication processing steps (e.g. oxidation,

• thermal stress) and also can be stretched/compressed on purpose (e.g. SiGe S/D, mechanical stretching) in

• flexible electronics.

• Recently, intensive research effort has been devoted to investigate the strain effects on the III-V/high-k structure 

• as alternatives to Si-based channel material devices.

    Approach

• Take all device circumstances into account by first-principle calculation based on the density functional theory, 

• the device structure is modeled in atomistic scale and optimized in the most stable condition.

• The band structure modulation with strain on crystal orientation and device geometry is investigated.

• Combining density functional theory and tight-binding method, the realistic strain effects and confinement on both

• electrons and holes are described.

• The full quantum electron/hole transport characteristics of MOSFET devices utilizing practical strain effects are investigated by employing non-equilibrium Green’s function.

Publications

• Journal

        3. Hyo-Eun Jung and Mincheol Shin, "Effects of Si/SiO2 interface stress on the performance of ultra-thin-body field effect 

            transistors: A first-principles study," Nanotechnology, vol. 29, 025201, 2017

        2. Hyo-Eun Jung and Mincheol Shin, "Surface roughness scattering effects on the ballisticity of Schottky barrier nanowire 

            field effect transistors," Journal of Applied Physics, vol. 118, pp. 195703, 2015

        1. Hyo-Eun Jung and Mincheol Shin, "Surface roughness limited mean free path in silicon nanowire field effect transistors," 

            IEEE TED, vol. 60, no. 6, pp.1861-1866, 2013

• Selected Conference

      11.  Mincheol Shin, Hyo-Eun Jung, and Sungwoo Jung,"First-principles based quantum transport simulations of nanoscale 

             field effect transistors," IEDM 2017, San Francisco, USA, 2017

      10. Mincheol Shin and Hyo-Eun Jung,  "First-principles based simulations of Si ultra-thin-body FETs with SiO2 gate 

            dielectric",  IWCN, Windermere, United Kingdom, 2017

        9. Byung-Hyun Kim, Seungchul Kim, Hyo-Eun Jung, YongChae Chung, Mincheol Shin, and Kwang-Ryeol Lee, "Multi-scale 

            approach for roughness effects of Si-SiO2 nanowire interface on electronic transport," ICCP, Singapore, 2015

        8. Mincheol Shin and Hyo-Eun Jung, "Quantum simulations of silicon nanowire field effect transistors: surface roughness 

            and strain effects," ISPSA, Jeju, Korea, 2014

        7. Junbeom Seo, Pooja Srivastave, Jaehyun Lee, Hyo-Eun Jung, Seungchul Kim, Kwang-Ryeol Lee, and Mincheol Shin,                     "Effects of strain for nanowire schottky barrier p-MOSFETs," ISPSA, Jeju, Korea, 2014

        6. Hyo-Eun Jung, Woo Jin Jeong, and Mincheol Shin, "A Study of performance enhancement in uniaxial stressed silicon 

            nanowire field effect transistors," SISPAD, Yokohama, Japan, 2014

        5. Hyo-Eun Jung and Mincheol Shin, "NEGF approach to surface roughness limited mean free path in silicon nanowire FETs,"             NMDC, Tainan, Taiwan, 2013

        4. Hyo-Eun Jung and Mincheol Shin, "Full quantum simulations of silicon schottky barrier nanowires with surface roughness 

            scattering," NanoKorea, 2013

        3. Hyo-Eun Jung and Mincheol Shin, "Surface roughness effects in schottky barrier tunneling transistors: comparative study 

            against ohmic contact devices," KCS, 2012

        2.  Byung-Hyun Kim, Hyo-Eun Jung, Yong-Chae Chung, Mincheol Shin, and Kwang-Ryeol Lee, "Multi-scale simulation of 

             interfacial roughness effects in silicon nanowire," SISPAD, Denver, USA, 2012

        1. Hyo-Eun Jung and Mincheol Shin, "Non-equilibrium Green's function approach to surface-roughness-limited mobility in 

            silicon nanowire field effect transistors," KCS, 2011